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Christoph Alt
pystencils
Commits
2d5fcf53
Commit
2d5fcf53
authored
Apr 24, 2021
by
Michael Kuron
Browse files
move NontemporalFence and CachelineSize to backend
parent
269c0bfa
Changes
4
Hide whitespace changes
Inline
Side-by-side
pystencils/astnodes.py
View file @
2d5fcf53
...
@@ -842,47 +842,3 @@ class ConditionalFieldAccess(sp.Function):
...
@@ -842,47 +842,3 @@ class ConditionalFieldAccess(sp.Function):
def
__getnewargs_ex__
(
self
):
def
__getnewargs_ex__
(
self
):
return
(
self
.
access
,
self
.
outofbounds_condition
,
self
.
outofbounds_value
),
{}
return
(
self
.
access
,
self
.
outofbounds_condition
,
self
.
outofbounds_value
),
{}
class
NontemporalFence
(
Node
):
def
__init__
(
self
):
super
(
NontemporalFence
,
self
).
__init__
(
parent
=
None
)
@
property
def
symbols_defined
(
self
):
return
set
()
@
property
def
undefined_symbols
(
self
):
return
set
()
@
property
def
args
(
self
):
return
[]
def
__eq__
(
self
,
other
):
return
isinstance
(
other
,
NontemporalFence
)
class
CachelineSize
(
Node
):
symbol
=
sp
.
Symbol
(
"_clsize"
)
mask_symbol
=
sp
.
Symbol
(
"_clsize_mask"
)
last_symbol
=
sp
.
Symbol
(
"_cl_lastvec"
)
def
__init__
(
self
):
super
(
CachelineSize
,
self
).
__init__
(
parent
=
None
)
@
property
def
symbols_defined
(
self
):
return
set
([
self
.
symbol
,
self
.
mask_symbol
,
self
.
last_symbol
])
@
property
def
undefined_symbols
(
self
):
return
set
()
@
property
def
args
(
self
):
return
[]
def
__eq__
(
self
,
other
):
return
isinstance
(
other
,
CachelineSize
)
pystencils/backends/cbackend.py
View file @
2d5fcf53
...
@@ -8,8 +8,8 @@ import sympy as sp
...
@@ -8,8 +8,8 @@ import sympy as sp
from
sympy.core
import
S
from
sympy.core
import
S
from
sympy.logic.boolalg
import
BooleanFalse
,
BooleanTrue
from
sympy.logic.boolalg
import
BooleanFalse
,
BooleanTrue
from
pystencils.astnodes
import
KernelFunction
,
Node
,
CachelineSize
from
pystencils.astnodes
import
KernelFunction
,
Node
from
pystencils.cpu.vectorization
import
vec_all
,
vec_any
from
pystencils.cpu.vectorization
import
vec_all
,
vec_any
,
CachelineSize
from
pystencils.data_types
import
(
from
pystencils.data_types
import
(
PointerType
,
VectorType
,
address_of
,
cast_func
,
create_type
,
get_type_of_expression
,
PointerType
,
VectorType
,
address_of
,
cast_func
,
create_type
,
get_type_of_expression
,
reinterpret_cast_func
,
vector_memory_access
,
BasicType
,
TypedSymbol
)
reinterpret_cast_func
,
vector_memory_access
,
BasicType
,
TypedSymbol
)
...
...
pystencils/backends/simd_instruction_sets.py
View file @
2d5fcf53
...
@@ -92,12 +92,13 @@ def get_cacheline_size(instruction_set):
...
@@ -92,12 +92,13 @@ def get_cacheline_size(instruction_set):
import
pystencils
as
ps
import
pystencils
as
ps
import
numpy
as
np
import
numpy
as
np
from
pystencils.cpu.vectorization
import
CachelineSize
arr
=
np
.
zeros
((
1
,
1
),
dtype
=
np
.
float32
)
arr
=
np
.
zeros
((
1
,
1
),
dtype
=
np
.
float32
)
f
=
ps
.
Field
.
create_from_numpy_array
(
'f'
,
arr
,
index_dimensions
=
0
)
f
=
ps
.
Field
.
create_from_numpy_array
(
'f'
,
arr
,
index_dimensions
=
0
)
ass
=
[
ps
.
astnodes
.
CachelineSize
(),
ps
.
Assignment
(
f
.
center
,
ps
.
astnodes
.
CachelineSize
.
symbol
)]
ass
=
[
CachelineSize
(),
ps
.
Assignment
(
f
.
center
,
CachelineSize
.
symbol
)]
ast
=
ps
.
create_kernel
(
ass
,
cpu_vectorize_info
=
{
'instruction_set'
:
instruction_set
})
ast
=
ps
.
create_kernel
(
ass
,
cpu_vectorize_info
=
{
'instruction_set'
:
instruction_set
})
kernel
=
ast
.
compile
()
kernel
=
ast
.
compile
()
kernel
(
**
{
f
.
name
:
arr
,
ps
.
astnodes
.
CachelineSize
.
symbol
.
name
:
0
})
kernel
(
**
{
f
.
name
:
arr
,
CachelineSize
.
symbol
.
name
:
0
})
_cachelinesize
=
int
(
arr
[
0
,
0
])
_cachelinesize
=
int
(
arr
[
0
,
0
])
return
_cachelinesize
return
_cachelinesize
pystencils/cpu/vectorization.py
View file @
2d5fcf53
...
@@ -26,6 +26,50 @@ class vec_all(sp.Function):
...
@@ -26,6 +26,50 @@ class vec_all(sp.Function):
nargs
=
(
1
,)
nargs
=
(
1
,)
class
NontemporalFence
(
ast
.
Node
):
def
__init__
(
self
):
super
(
NontemporalFence
,
self
).
__init__
(
parent
=
None
)
@
property
def
symbols_defined
(
self
):
return
set
()
@
property
def
undefined_symbols
(
self
):
return
set
()
@
property
def
args
(
self
):
return
[]
def
__eq__
(
self
,
other
):
return
isinstance
(
other
,
NontemporalFence
)
class
CachelineSize
(
ast
.
Node
):
symbol
=
sp
.
Symbol
(
"_clsize"
)
mask_symbol
=
sp
.
Symbol
(
"_clsize_mask"
)
last_symbol
=
sp
.
Symbol
(
"_cl_lastvec"
)
def
__init__
(
self
):
super
(
CachelineSize
,
self
).
__init__
(
parent
=
None
)
@
property
def
symbols_defined
(
self
):
return
set
([
self
.
symbol
,
self
.
mask_symbol
,
self
.
last_symbol
])
@
property
def
undefined_symbols
(
self
):
return
set
()
@
property
def
args
(
self
):
return
[]
def
__eq__
(
self
,
other
):
return
isinstance
(
other
,
CachelineSize
)
def
vectorize
(
kernel_ast
:
ast
.
KernelFunction
,
instruction_set
:
str
=
'best'
,
def
vectorize
(
kernel_ast
:
ast
.
KernelFunction
,
instruction_set
:
str
=
'best'
,
assume_aligned
:
bool
=
False
,
nontemporal
:
Union
[
bool
,
Container
[
Union
[
str
,
Field
]]]
=
False
,
assume_aligned
:
bool
=
False
,
nontemporal
:
Union
[
bool
,
Container
[
Union
[
str
,
Field
]]]
=
False
,
assume_inner_stride_one
:
bool
=
False
,
assume_sufficient_line_padding
:
bool
=
True
):
assume_inner_stride_one
:
bool
=
False
,
assume_sufficient_line_padding
:
bool
=
True
):
...
@@ -156,9 +200,9 @@ def vectorize_inner_loops_and_adapt_load_stores(ast_node, vector_width, assume_a
...
@@ -156,9 +200,9 @@ def vectorize_inner_loops_and_adapt_load_stores(ast_node, vector_width, assume_a
parent
=
loop_node
.
parent
parent
=
loop_node
.
parent
while
type
(
parent
.
parent
.
parent
)
is
not
ast
.
KernelFunction
:
while
type
(
parent
.
parent
.
parent
)
is
not
ast
.
KernelFunction
:
parent
=
parent
.
parent
parent
=
parent
.
parent
parent
.
parent
.
insert_after
(
ast
.
NontemporalFence
(),
parent
,
if_not_exists
=
True
)
parent
.
parent
.
insert_after
(
NontemporalFence
(),
parent
,
if_not_exists
=
True
)
# insert CachelineSize at the beginning of the kernel
# insert CachelineSize at the beginning of the kernel
parent
.
parent
.
insert_front
(
ast
.
CachelineSize
(),
if_not_exists
=
True
)
parent
.
parent
.
insert_front
(
CachelineSize
(),
if_not_exists
=
True
)
if
not
successful
:
if
not
successful
:
warnings
.
warn
(
"Could not vectorize loop because of non-consecutive memory access"
)
warnings
.
warn
(
"Could not vectorize loop because of non-consecutive memory access"
)
continue
continue
...
...
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